2015年11月18日 星期三

ADDER1

module top;
system_clock #400 clock1(C);
system_clock #200 clock2(A);
system_clock #100 clock3(B);

adder1 m1(A, B, C, Cout, Sum);

endmodule

module adder1(A, B, C,Cout,Sum);
output Cout, Sum;
input A, B, C;
not I1(Anot,A);
not I2(Bnot,B);
not I3(Cnot,C);

and I4(S1,A,B);
and I5(S2,B,C);
and I6(S3,A,C);
and I7(S4,A,B,C);
and I8(S5,A,Bnot,Cnot);
and I9(S6,Anot,B,Cnot);
and I10(S7,Anot,Bnot,C);

or I11(Cout,S1,S2,S3);
or I12(Sum,S4,S5,S6,S7);

endmodule

module system_clock(clk);
parameter PERIOD=100;
output clk;
reg clk;

initial clk=0;

always
 begin
#(PERIOD/2) clk=~clk;
 end

always@(posedge clk)
 if($time>1000)$stop;

endmodule

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